WebJul 3, 2016 · phy: marvell: fix LED configuration via marvell,reg-init Colin Ian King (2): rtl8xxxu: fix typo on variable name, compare against correct variable devpts: fix null pointer dereference on failed memory allocation Crestez Dan Leonard (1): iio: inv_mpu6050: Fix use-after-free in ACPI code Cristina Ciocan (1): pinctrl: baytrail: Fix mingled clock pins WebThis commit moves the call of marvell_of_reg_init to config_init. Now, a marvell,reg-init option to enable PHY interrupts on pin LED[2] is set early on and the phy state machine does not get stuck anymore. Tested on i.MX6Q boards with Marvell 88E1510 PHYs. Signed-off-by: Clemens Gruber ---
Use KSZ9896 as PHY on Jetson AGX Xavier #89 - Github
WebLinux debugging, tracing, profiling & perf. analysis. Check our new training course. with Creative Commons CC-BY-SA WebJun 24, 2024 · SammoGan June 18, 2024, 8:56am 1. Hi,we are replacing the PHY (Marvell 88E1512) of Xavier with a Switch (Marvell 88E6352),and the switch connect with Xavier … flight load carrier
[PATCH v2] phy: marvell: Fix and unify reg-init behavior
WebProperties for an MDIO bus multiplexer/switch controlled by GPIO pins. This is a special case of a MDIO bus multiplexer. One or more GPIO: lines are used to control which child bus is connected. WebApr 11, 2011 · Then compare that to what the driver is trying to set. Then you will either have to override the configuration with the device tree "marvell,reg-init" property, or if you are not using the device tree, add a 88e1145 specific flag … WebAug 3, 2024 · …/git/netdev/net-next Pull networking changes from Paolo Abeni: "Core: - Refactor the forward memory allocation to better cope with memory pressure with many open sockets, moving from a per socket cache to a per-CPU one - Replace rwlocks with RCU for better fairness in ping, raw sockets and IP multicast router. flight lo3